All-In-One Scriptless Test Automation Solution!

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Job Details

Job Title
: IC Layout Engineer
Required Skills
: ADC, Assura, Band Gap, Cadence Layout XL, Cadence Virtuoso, Calibre DRC, DAC, EAD, GXL, Layout, LVS, mixed signal, PLL, PVS, Voltage Regulator
Location
Duration
: up to 6 months contract with possible extension

Job Description

Pay Range: $50-$60/hr. The pay rate may differ depending on your skills, education, experience, and other qualifications.

Featured Benefits: 

  • Medical Insurance in compliance with the ACA.
  • 401(k).
  • Sick leave in compliance with applicable state, federal, and local laws.

Note: The position is based on-site out of our client in Morrisville NC, Rolling Meadows IL, or Baltimore, MD location. The opportunity for virtual work-from-home (either or, both) work may be extended to the right candidate but would be bounded by domicile proximity to the three base locations with the agreement to work on-site if asked.

Work Schedule:           5×8 (M-F)

Job Description:

  • The ideal candidate must have exceptional layout skills using Cadence Virtuoso XL and be comfortable at all levels of hierarchy, including chip-level. The developmental nature of our foundry activities will provide a willing candidate the opportunity to develop into an integral member of the foundry organization.

Responsibilities include:

  • Creating and verifying hierarchical mixed-signal layouts of chips or circuits such as ADCs, DACs, PLLs, Band Gaps, Voltage Regulators, etc. with guidance from circuit designers.
  • Strong communication skills and understanding how layout impacts circuit performance are a must.
  • Interpreting results from layout verification tools such as Calibre DRC/LVS or Cadence Assura/PVS.
  • Creating/reviewing/analyzing/modifying floor plans drawn from the top-down perspective.
  • Creating staffing plans and schedule estimates for layout related tasks.
  • Delivering verified layout on-time according to plan.
  • Participate in reticle composition and/or support of tape-out activities.
  • Create and document flows for future re-use and quality control.

Basic Qualifications:

  • Principal: Minimum of an associate’s degree in a relevant field with 8 years of relevant experience or 5 years with a Bachelor’s Degree in a relevant field.
  • Sr. Principal: Minimum of associate’s degree in a relevant field with 12 years of relevant experience or 9 years with a bachelor’s degree in a relevant field.
  • Experience laying out custom analog/custom digital/custom RF cells as a top level lead.
  • Proficient in floor planning especially top-down, area optimization, and handling critical devices and signals with the proper care.
  • Demonstrated expertise creating a floorplan of a complete IC to minimize parasitic issues related to layout and packaging.
  • Demonstrated expertise developing high quality layouts for complex Analog and Mixed Signal (“AMS”) designs using Cadence Virtuoso XL/GXL.
  • Considerable experience using Cadence Layout XL (a power user) to do full custom layout of complete mixed signal ICs and/or test structures.
  • Solid debugging skills of results generated by industry standard layout verification tools.
  • Demonstrated expertise isolating critical analog blocks from noisy sources through layout noise-coupling suppression techniques.
  • Solid knowledge of how to address EM/IR issues, prevent latch-up, mitigate ESD, and ensure component and signal path matching.
  • High attention to detail and ability to deliver verified and optimized layout quickly.
  • Ability to distinguish between devices and nets in a schematic that need to be handled with care vs. those that do not.
  • Strong interpersonal and team skills for cross-functional collaboration and the ability to work independently.

Advantageous Qualifications:

  • Knowledge of semiconductor device physics, process development, analog/mixed signal integrated circuit design, manufacturing, and testing,
  • Experience using SKILL, Perl, C-Shell, and/or Python to increase layout productivity.
  • Experience using Cadence Virtuoso’s other advanced features (GXL, EAD, and Constraint Manager).
  • Experience in deep submicron CMOS circuits with finFETs and dual patterning.
  • Technical understanding of IR drop, RC delay, electro-migration, self-heating, and coupling capacitance.

Required Details

Experience
: 5 years
Travel Required
: No
Clearance Required
: No

Contact Details

Contact person
: Anil Kumar
Phone
: 678-203-2570
Website
: https://suntechnologies.com

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